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CVE-2020-0574 Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to…
Description
Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.
Produits et versions touchés
| Produit | Versions touchées | Corrigé en |
|---|---|---|
| Intel(R) MAX(R) 10 FPGA | Versions non publiées |