| CVE-2025-10263 |
Arm C1-Ultra, C1-Premium, Neoverse V3 & V3AE, Neoverse V2, Neoverse V1, Neoverse-N2, Neoverse-N1, Cortex-X925,…
|
9.1
Critique
|
9 juin 2026 |
| CVE-2025-0647 |
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when…
|
7.9
Élevée
|
14 janv. 2026 |
| CVE-2024-7881 |
An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged…
|
5.1
Moyenne
|
28 janv. 2025 |
| CVE-2024-5660 |
Use of Hardware Page Aggregation (HPA) and Stage-1 and/or Stage-2 translation on Cortex-A77, Cortex-A78, Cortex-A78C,…
|
9.8
Critique
|
10 déc. 2024 |