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Vulnérabilités de AMD AMD EPYC™ Embedded 9004 Series Processors

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CVE Résumé Score Publiée
CVE-2025-54510 A missing lock verification in AMD Secure Processor (ASP) firmware may permit a locally authenticated attacker with… 5.9 Moyenne 16 avr. 2026
CVE-2023-20585 Insufficient checks of the RMP on host buffer access in IOMMU may allow an attacker with privileges and a compromised… 5.6 Moyenne 16 avr. 2026
CVE-2025-0031 A use after free in the SEV firmware could allow a malicous hypervisor to activate a migrated guest with the… 4.6 Moyenne 10 févr. 2026
CVE-2024-21953 Improper input validation in IOMMU could allow a malicious hypervisor to reconfigure IOMMU registers resulting in loss… 5.9 Moyenne 10 févr. 2026
CVE-2024-36354 Improper input validation for DIMM serial presence detect (SPD) metadata could allow an attacker with physical access,… 7.5 Élevée 6 sept. 2025
CVE-2024-36331 Improper initialization of CPU cache memory could allow a privileged attacker with hypervisor access to overwrite… 3.2 Faible 6 sept. 2025
CVE-2023-31351 Improper restriction of operations in the IOMMU could allow a malicious hypervisor to access guest private memory… 5.3 Moyenne 6 sept. 2025
CVE-2024-21977 Incomplete cleanup after loading a CPU microcode patch may allow a privileged attacker to degrade the entropy of the… 3.2 Faible 5 sept. 2025
CVE-2024-36357 A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache,… 5.6 Moyenne 8 juil. 2025
CVE-2024-36350 A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores,… 5.6 Moyenne 8 juil. 2025
CVE-2024-36348 A transient execution vulnerability in some AMD processors may allow a user process to infer the control registers… 3.8 Faible 8 juil. 2025
CVE-2024-36349 A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a… 3.8 Faible 8 juil. 2025

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